The present invention relates generally to adjustable speed drives and, more particularly, to a system and method for detecting input phase loss and diagnosing DC link capacitor health in an adjustable speed drive.
Motor drives are frequently used in industrial applications to condition power and otherwise control electric driven motors such as those found with pumps, fans, compressors, cranes, paper mills, steel mills, rolling mills, elevators, machine tools, and the like. Motor drives typically provide a volts-per-hertz control and have greatly improved the efficiency and productivity of electric driven motors and applications. Increasingly, motor drives are taking the form of adjustable speed drives (ASD) that are adept at providing variable speed and/or variable torque control to an electric driven motor.
Ideally, the input power supplied from the utility grid to the three-phase power distribution system used in an ASD would be constant and balanced. However, a variety of power quality disturbances exist today, including harmonic distortion, frequency variation, noise, transient voltage spikes, outages, and voltage surges and sags. Among the various types of power quality disturbances, unbalanced voltage sags occur most frequently. As an example, the DC link voltage is reduced when an input phase loss occurs. Additionally, input phase loss can cause system component breakdown and can compromise productivity and reliability. In the case of ASDs, if the phase loss is not detected properly and promptly, equipment failures will occur.
Unbalanced input voltages and phase loss negatively impact ASDs in a number of ways. First, unbalanced voltages can create significant input current unbalances that stress the diode bridge rectifiers and input protective devices such as fuses, contactors, and circuit breakers. Second, voltage unbalances can give rise to significant amounts of 120 Hz ripple torque in the ASD induction machine, increasing mechanical and thermal stresses. Third, unbalanced voltages typically inject a second harmonic voltage component on to the DC bus voltage that increases electrical stresses on the DC link capacitor, potentially shortening the capacitor lifetime.
The DC link capacitors typically used in ASDs are electrolytic capacitor, which provide large capacitance and ride-through energy storage capacity on the DC link. In addition, the capacitors filter the rectifier voltage ripple and act as a low impedance path for ripple currents generated by the rectifier and PWM inverter stages. The sizing of the DC link capacitors is mainly determined by its lifespan.
Several factors affect the lifespan of DC link capacitors in an ASD system. These factors include applied voltage, ripple current, frequency, ambient temperature, as well as airflow. However, the lifetime of DC link capacitors is principally determined by their core temperatures.
Both rectifier and inverter ripple currents contribute to the capacitor temperature rise. Under voltage sag conditions, ASDs can easily enter single-phase operation, even with a small amount of voltage imbalance. Under voltage imbalance conditions, an elevated ripple current is induced in the DC link capacitors. High ripple currents can cause shorter operating life than expected for DC link capacitors because an increase in the equivalent series resistance (ESR) of the capacitor causes more heating for the same ripple current, thus increasing the core temperature rise and accelerating the failure mechanisms.
When the operating temperature is near the capacitor's rated value, the additional leakage current that results from operating near the maximum voltage rating can cause electrochemical degradation and hydrogen gas evolution that reduce the capacitor lifetime. The primary cause of electrolytic capacitor degradation and end-of-life failure is due to diffusion of the electrolyte that escapes through the end seals. A high temperature will accelerate this process.
To detect and address the phase loss problems in electrical power distribution systems, manufacturers have introduced hardware designed to be integrated inside the ASD to detect utility phase loss conditions. However, such devices add undesirable cost and complexity to the ASD. Further, while such devices may monitor for phase loss, they do not monitor or account for the effect of phase loss on the DC link capacitor.
Accordingly, it would be desirable to design a system and method capable of non-invasive input phase loss detection to the ASD. Further, it would be desirable to design a system and method for estimating the health impact of a detected phase loss on the DC link capacitors as well as the lifespan of the DC link capacitors.